1. Field of the Invention
The present disclosure relates to switching devices and energy recovery circuits having the same, and more particularly, to a bi-directional high voltage switching device and an energy recovery circuit that reduces the amount of energy consumed when charging or discharging a load capacitor by efficiently driving the bi-directional high voltage switching device.
2. Description of the Related Art
In order for an energy recovery circuit to make efficient use of energy when using a high voltage as a power supply voltage, the energy recovery circuit additionally includes an energy recovery capacitor that charges a load capacitor to a power supply voltage level or discharges the load capacitor to a ground voltage level. The amount of energy consumed when charging or discharging the load capacitor over several steps with the use of the energy recovery capacitor is smaller than the amount of energy consumed when performing the charge or discharge of the load capacitor in a single step. For example, in the case of charging the load capacitor to a desired voltage level in two steps by using the energy recovery capacitor, the load capacitor is charged with half of the voltage stored in the energy recovery capacitor in the first step, and then charged with the rest of the voltage stored in the energy recovery capacitor in the second step. Likewise, in the case of discharging the load capacitor in two steps by using the energy recovery capacitor, the load capacitor is discharged by half of the voltage in the first step, and then discharged by the other half of the voltage in the second step.
In order to realize the energy recovery circuit as a semiconductor device that uses a high voltage as a power supply voltage, a double diffused metal oxide semiconductor field effect transistor (DMOS FET) should be used as a bi-directional switching device for the energy recovery circuit. However, a conventional DMOS FET is inappropriate for being used as the bi-directional switching device for the energy recovery circuit because of the following reasons.
FIGS. 1A and 1B are equivalent circuit diagrams of a conventional N-channel DMOS FET 100 and a conventional P-channel DMOS FET 150, respectively. The conventional N-channel 100 and P-channel 150 DMOS FETs are connected to their respective semiconductor substrates at their respective sources SN and SP.
In the conventional N-channel DMOS FET 100, the source SN and a drain DN are not formed symmetrically to each other, and the source SN is connected to the semiconductor substrate on which the conventional N-channel DMOS FET is formed. Thus, when represented in equivalent circuit form, the conventional N-channel DMOS FET 100 includes a parasitic body diode 110 between the source SN and the drain DN, as shown in FIG. 1A.
When current flows from the drain DN to the source SN, a backward bias is applied to the parasitic body diode 110, and thus the parasitic body diode is turned off. Accordingly, it is possible to adjust the amount of current flowing between the drain DN and the source SN depending on the level of voltage applied to a gate GN of the FET. On the other hand, when current flows from the source SN to the drain DN, a forward bias is applied to the parasitic body diode 110, and thus the parasitic body diode is turned on. Accordingly, it is impossible to adjust the amount of current flowing between the drain DN and the source SN simply based on the level of voltage applied to the gate GN. Therefore, the conventional N-channel DMOS FET 100 is inappropriate for being used as a bi-directional switching device.
In the conventional P-channel DMOS FET 150, like in the conventional N-channel DMOS FET 100, the source SP and a drain DP are not formed symmetrically to each other, and the source SP is connected to the semiconductor substrate on which the conventional P-channel DMOS FET 150 is formed. Thus, when represented in equivalent circuit form, the conventional P-channel DMOS FET 150 includes a parasitic body diode 160 between the source SP and the drain DP, as shown in FIG. 1B.
When current flows from the source SP to the drain DP, a backward bias is applied to the parasitic body diode 160, and thus the parasitic body diode is turned off. Accordingly, it is possible to adjust the amount of current flowing between the drain DP and the source SP depending on the level of voltage applied to a gate GP. On the other hand, when current flows from the drain DP to the source SP, a forward bias is applied to the parasitic body diode, and thus the parasitic body diode 160 is turned on. Accordingly, it is impossible to adjust the amount of current flowing between the drain DP and the source SP simply based on the level of voltage applied to a gate GP. Therefore, the conventional P-channel DMOS FET, like the conventional N-channel DMOS FET, is inappropriate for being used as a bi-directional switching device.